Conventional apparatus used to treat substrates with ions include beamline ion implanters and plasma immersion ion implantation tools. Both are appropriate for implanting ions over a range of energies. In beamline ion implanters ions are extracted from a source, mass analyzed and then transported to the substrate surface. In plasma immersion ion implantation apparatus, a substrate is located in the same chamber the plasma is generated adjacent to the plasma. The substrate is set at negative potential with respect to the plasma and ions that cross the plasma sheath in front of the substrate impinge on the substrate at zero incidence angle with respect to a perpendicular to a surface of the substrate.
Recently, a new type of processing apparatus has been developed allowing the generation of an ion beam such as a ribbon beam in a compact system. In this apparatus ions are extracted from a plasma chamber, while unlike the beamline ion implanters where the substrate is located remotely from the ion source, the substrate is located proximate the plasma chamber. Ions are extracted through an aperture of special geometry located in an extraction plate that is placed proximate a plasma. The ions may be extracted as a ribbon beam made of positive ions by biasing the plasma chamber with a dc potential positively with respect to a substrate. While a substrate may be grounded, positive charge may build up on a substrate from bombardment with positive ions and secondary electron emission. Accordingly, in known systems a pulsed DC voltage may be applied to allow neutralization of a substrate during a pulse “OFF” period. For some substrates such as semiconductor structures having an arrangement including oxide layers, the positive charge accumulated on the substrate surface may not be fully neutralized even for high pulsing frequency and/or low duty cycle operation. Consequently, when ions are directed to the substrate for etching or other substrate processing, non-uniform etch patterns may occur across a substrate surface, and damage of the semiconductor structures may occur, resulting in poor processing yield.
With respect to these and other considerations the present embodiments are provided.